Windows 2000 PCI Detection and Resource Assignment

Microsoft Windows 2000 manages PCI card auto-detection and resource assignment through an integrated Plug and Play (PnP) architecture driven by the operating system's kernel, the Hardware Abstraction Layer (HAL), and the native PCI bus driver. By interrogating the hardware via standard PCI configuration registers and negotiating with system firmware—specifically through ACPI or legacy BIOS interfaces—Windows 2000 dynamically detects hardware, prevents hardware resource conflicts, dynamically routes interrupts, and maps memory and input/output (I/O) ranges without requiring manual jumper configuration.

Device Enumeration and Identification

When the system boots or when the system scans for hardware changes, the Windows 2000 PnP Manager queries the native PCI bus driver (pci.sys). The bus driver walks through every PCI bus, device slot, and function within the system by reading the standard 256-byte PCI Configuration Space.

During this scan, the driver reads critical identification fields:

  • Vendor ID (VID) and Device ID (DID)
  • Subsystem Vendor ID (SVID) and Subsystem ID (SID)
  • Revision ID and Class Code

The PCI bus driver uses this data to generate hardware device identification strings (Device IDs and Compatible IDs). It reports these identifiers to the PnP Manager, which then references the Windows Registry and driver information files (.inf) to locate and load the appropriate device driver.

Resource Requirements Discovery

To determine what hardware resources a PCI card requires, the PCI bus driver interrogates the card's Base Address Registers (BARs) and the Interrupt Pin register located in the Configuration Space:

  1. Memory and I/O Ranges: The bus driver writes all 1s (0xFFFFFFFF) to each Base Address Register and reads back the values. The returned bit pattern indicates whether the card requires I/O ports or memory-mapped I/O (MMIO), as well as the size and alignment requirements of the requested address spaces.
  2. Interrupt Requirements: The driver inspects the card's Interrupt Pin register (indicating INT A#, B#, C#, or D#) to determine if the device requires an Interrupt Request (IRQ) line.

The bus driver gathers these constraints into an I/O Resource Requirements List and passes it up the driver stack to the PnP Manager.

Resource Arbitration and Allocation

Because multiple devices often compete for limited system resources, the PnP Manager relies on kernel-mode Resource Arbiters. Windows 2000 includes individual arbiters for each resource type: I/O ports, memory ranges, IRQ lines, and DMA channels.

The allocation process works through the following stages:

  • Conflict Resolution: The arbiters evaluate existing assignments alongside the requirements of the newly detected card. If the card’s requirements conflict with an existing device, the PnP Manager can rebalance non-boot devices dynamically, relocating flexible memory or I/O windows to accommodate devices with rigid requirements.
  • Firmware Coordination (ACPI vs. Legacy): On ACPI-compliant systems, Windows 2000 bypasses legacy BIOS resource routines and communicates directly with ACPI tables to configure system bridges and routing tables. On non-ACPI systems, it relies on the PCI BIOS or the MultiProcessor Specification (MPS) tables.
  • IRQ Routing and Steering: Unlike legacy ISA devices that required dedicated IRQs, the PCI specification supports shared interrupts. Windows 2000 employs PCI IRQ Steering. The OS uses the system's interrupt router hardware (such as an Advanced Programmable Interrupt Controller, or APIC) to map the device’s physical PCI interrupt pin to an available system IRQ vector, allowing multiple PCI devices to safely share a single interrupt vector.

Hardware Configuration and Initialization

Once the arbiters assign valid, non-conflicting resources, the PnP Manager sends an IRP_MN_START_DEVICE (I/O Request Packet) containing the finalized resource list back down to the PCI bus driver.

The bus driver then programs the assigned resources directly into the card's Configuration Space:

  • Base memory and I/O addresses are written into the corresponding BARs.
  • The allocated IRQ line number is written into the Interrupt Line register.
  • The Command Register is modified to enable the device's I/O response, memory space access, and bus master capabilities.

Finally, the functional device driver initializes the card, mapping the assigned memory and I/O ranges into system space and connecting interrupt service routines (ISRs) to the assigned IRQ vector, making the hardware ready for system use.